Initial work on Proton-C board definition.

app/boards/arm/proton_c/CMakeLists.txt

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: Apache-2.0
+
+if(CONFIG_PINMUX)
+zephyr_library()
+zephyr_library_sources(pinmux.c)
+zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)
+endif()

app/boards/arm/proton_c/Kconfig.board

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+# QMK Proton-C board configuration
+
+# Copyright (c) 2020 Pete Johanson
+# SPDX-License-Identifier: MIT
+
+config BOARD_QMK_PROTON_C
+	bool "QMK Proton-C"
+	depends on SOC_STM32F303XC

app/boards/arm/proton_c/Kconfig.defconfig

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+# QMK Proton-C board configuration
+
+# Copyright (c) 2020 Pete Johanson
+# SPDX-License-Identifier: MIT
+
+if BOARD_QMK_PROTON_C
+
+config BOARD
+	default "proton_c"
+
+endif # BOARD_QMK_PROTON_C

app/boards/arm/proton_c/arduino_pro_micro_pins.dtsi

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+/*
+ * Copyright (c) 2020 Pete Johanson
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+/ {
+	pro_micro_pins: connector {
+		compatible = "arduino-pro-micro";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map =
+			<1 0 &gpioa 9 0>,	/* D1 */
+			<0 0 &gpioa 10 0>,	/* D0 */
+			<2 0 &gpiob 7 0>,	/* D2 */
+			<3 0 &gpiob 6 0>,	/* D3 */
+			<4 0 &gpiob 5 0>,	/* D4/A6 */
+			<5 0 &gpiob 4 0>,	/* D5 */
+			<6 0 &gpiob 3 0>,	/* D6/A7 */
+			<7 0 &gpiob 2 0>,	/* D7 */
+			<8 0 &gpiob 1 0>,	/* D8/A8 */
+			<9 0 &gpiob 0 0>,	/* D9/A9 */
+			<10 0 &gpiob 9 0>,	/* D10/A10 */
+			<16 0 &gpiob 15 0>,	/* D16 */
+			<14 0 &gpiob 14 0>,	/* D14 */
+			<15 0 &gpiob 13 0>,	/* D15 */
+			<18 0 &gpiob 8 0>,	/* A0 */
+			<19 0 &gpioa 0 0>,	/* A1 */
+			<20 0 &gpioa 1 0>,	/* A2 */
+			<21 0 &gpioa 2 0>;	/* A3 */
+	};
+};
+
+pro_micro_i2c: &i2c1 {};
+pro_micro_spi: &spi1 {};
+pro_micro_serial: &usart1 {};

app/boards/arm/proton_c/board.cmake

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+# SPDX-License-Identifier: MIT
+
+board_runner_args(jlink "--device=STM32F303VC" "--speed=4000")
+
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

app/boards/arm/proton_c/pinmux.c

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+/*
+ * Copyright (c) 2017 I-SENSE group of ICCS
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <kernel.h>
+#include <device.h>
+#include <init.h>
+#include <drivers/pinmux.h>
+#include <sys/sys_io.h>
+
+#include <pinmux/stm32/pinmux_stm32.h>
+
+/* pin assignments for STM32F3DISCOVERY board */
+static const struct pin_config pinconf[] = {
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay) && CONFIG_SERIAL
+	{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
+	{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
+#endif
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay) && CONFIG_SERIAL
+	{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
+	{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
+#endif
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay) && CONFIG_I2C
+	{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
+	{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
+#endif
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c2), okay) && CONFIG_I2C
+	{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
+	{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
+#endif
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
+#ifdef CONFIG_SPI_STM32_USE_HW_SS
+	{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
+#endif /* CONFIG_SPI_STM32_USE_HW_SS */
+	{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
+	{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
+	{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
+#endif
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
+#ifdef CONFIG_SPI_STM32_USE_HW_SS
+	{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
+#endif /* CONFIG_SPI_STM32_USE_HW_SS */
+	{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
+	{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
+	{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
+#endif
+#ifdef CONFIG_USB_DC_STM32
+	{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
+	{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
+#endif	/* CONFIG_USB_DC_STM32 */
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(can1), okay) && CONFIG_CAN
+	{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
+	{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
+#endif
+};
+
+static int pinmux_stm32_init(struct device *port)
+{
+	ARG_UNUSED(port);
+
+	stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
+
+	return 0;
+}
+
+SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
+		CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

app/boards/arm/proton_c/proton_c.dts

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+/*
+ * Copyright (c) 2020 Pete Johanson
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+/dts-v1/;
+#include <st/f3/stm32f303Xc.dtsi>
+#include "arduino_pro_micro_pins.dtsi"
+
+/ {
+	model = "QMK Proton C";
+	compatible = "qmk,proton_c", "st,stm32f303";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led: led_0 {
+			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
+			label = "User LED";
+		};
+	};
+};
+
+&usb {
+	status = "okay";
+};
+
+&rtc {
+	status = "okay";
+};
+
+&flash0 {
+	/*
+	 * For more information, see:
+	 * http://docs.zephyrproject.org/latest/guides/dts/index.html#flash-partitions
+	 */
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* Set 6Kb of storage at the end of the 256Kb of flash */
+		storage_partition: partition@3e800 {
+			label = "storage";
+			reg = <0x0003e800 0x00001800>;
+		};
+	};
+};

app/boards/arm/proton_c/proton_c.yaml

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+identifier: proton_c
+name: QMK Proton-C
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+ram: 40
+supported:
+  - gpio
+  - i2c
+  - counter
+  - spi
+  - usb_device
+  - lsm303dlhc
+  - nvs
+  - can

app/boards/arm/proton_c/proton_c_defconfig

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+# SPDX-License-Identifier: MIT
+
+CONFIG_SOC_SERIES_STM32F3X=y
+CONFIG_SOC_STM32F303XC=y
+# 72MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
+
+# Floating Point Options
+CONFIG_FPU=y
+
+# enable pinmux
+CONFIG_PINMUX=y
+
+# enable GPIO
+CONFIG_GPIO=y
+
+# clock configuration
+CONFIG_CLOCK_CONTROL=y
+
+# Clock configuration for Cube Clock control driver
+CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
+CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+# use HSE as PLL input
+CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
+# produce 72MHz clock at PLL output
+CONFIG_CLOCK_STM32_PLL_PREDIV=1
+CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9
+CONFIG_CLOCK_STM32_AHB_PRESCALER=1
+CONFIG_CLOCK_STM32_APB1_PRESCALER=2
+CONFIG_CLOCK_STM32_APB2_PRESCALER=1