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forgot to commit this lmao

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xenua 2 years ago
parent
commit
21aa596128
Signed by: xenua
GPG Key ID: 8F93B68BD37255B8
  1. 57187
      cores/go/go-rounded.kicad_pcb
  2. 1435
      cores/go/go.kicad_pcb
  3. 3
      cores/home/fp-lib-table
  4. 356
      cores/home/home.kicad_pro
  5. 2513
      cores/home/home.kicad_sch
  6. 3753
      cores/home/hub.kicad_sch
  7. 3
      cores/home/sym-lib-table
  8. 117213
      heads/lefthand/lefthand-rounded.kicad_pcb
  9. 2134
      heads/lefthand/lefthand.kicad_pcb
  10. 107771
      heads/righthand/righthand-rounded.kicad_pcb
  11. 3
      heads/righthand/righthand.kicad_pcb

57187
cores/go/go-rounded.kicad_pcb

File diff suppressed because it is too large Load Diff

1435
cores/go/go.kicad_pcb

File diff suppressed because it is too large Load Diff

3
cores/home/fp-lib-table

@ -0,0 +1,3 @@ @@ -0,0 +1,3 @@
(fp_lib_table
(lib (name "xenua")(type "KiCad")(uri "/home/julia/Projects/keebs/hydrated/libs/xenua.pretty")(options "")(descr ""))
)

356
cores/home/home.kicad_pro

@ -2,26 +2,120 @@ @@ -2,26 +2,120 @@
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.1,
"copper_line_width": 0.2,
"board_outline_line_width": 0.09999999999999999,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.15,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.762,
"height": 1.524,
"width": 1.524
},
"silk_line_width": 0.15,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.508
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0
"solder_mask_min_width": 0.0,
"use_height_for_length_calcs": true
},
"track_widths": [],
"via_dimensions": []
"via_dimensions": [],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
@ -29,6 +123,211 @@ @@ -29,6 +123,211 @@
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
0,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
@ -74,9 +373,52 @@ @@ -74,9 +373,52 @@
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
"legacy_lib_dir": "",
"legacy_lib_list": []
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [],
"sheets": [
[
"e63e39d7-6ac0-4ffd-8aa3-1841a4541b55",
""
],
[
"bc2a5ced-eeb1-439a-af36-33671573acee",
"hub"
]
],
"text_variables": {}
}

2513
cores/home/home.kicad_sch

File diff suppressed because it is too large Load Diff

3753
cores/home/hub.kicad_sch

File diff suppressed because it is too large Load Diff

3
cores/home/sym-lib-table

@ -0,0 +1,3 @@ @@ -0,0 +1,3 @@
(sym_lib_table
(lib (name "xenua")(type "KiCad")(uri "/home/julia/Projects/keebs/hydrated/libs/xenua.kicad_sym")(options "")(descr ""))
)

117213
heads/lefthand/lefthand-rounded.kicad_pcb

File diff suppressed because it is too large Load Diff

2134
heads/lefthand/lefthand.kicad_pcb

File diff suppressed because it is too large Load Diff

107771
heads/righthand/righthand-rounded.kicad_pcb

File diff suppressed because it is too large Load Diff

3
heads/righthand/righthand.kicad_pcb

@ -3013,6 +3013,9 @@ @@ -3013,6 +3013,9 @@
(gr_text "035035" (at 58.5 159) (layer "F.SilkS") (tstamp 4e803fa1-d38e-45f2-8909-3a5f429edd34)
(effects (font (size 1 1) (thickness 0.15)))
)
(gr_text "JLCJLCJLCJLC" (at 70 86) (layer "F.SilkS") (tstamp 7c2e2eac-a58d-436d-b4b6-f12f3dce2920)
(effects (font (size 1 1) (thickness 0.15)))
)
(gr_text "hydrated\nheads/righthand" (at 88 134.5) (layer "F.SilkS") (tstamp d17b2487-8b7b-4157-a856-72312005674b)
(effects (font (size 1 1) (thickness 0.15)))
)

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