Drill report for ducklace.kicad_pcb Created on Mon Apr 10 17:36:39 2023 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'ducklace.drl' contains plated through holes: ============================================================= T1 0.200mm 0.0079" (56 holes) T2 0.400mm 0.0157" (8 holes) T3 1.000mm 0.0394" (10 holes) T4 2.200mm 0.0866" (1 hole) Total plated holes count 75 Not plated through holes are merged with plated holes unplated through holes: ============================================================= T5 1.000mm 0.0394" (2 holes) Total unplated holes count 2